Senior VLSI Design Engineer (IO Design, High Speed DDR)

Actively contribute to provide High Speed DDR IO solutions for next generation Memory in advanced CMOS technology nodes.

Designing high Speed IO Blocks, Powerbus analysis, Jitter / High speed timing closure

Work closely within the team, cross functional teams like Layout, verification, actively participate in technical discussions and reviews.

Contribute to or propose innovative design solutions and design methodologies for future generation