Analog & Mixed-Signal Design Engineer (3 to 5 years of experience)

Will be part of team responsible for IO solutions for next generation SOCs in advanced CMOS technology nodes. Will work on IO solutions for SanDisk ASIC controllers under guidance of senior team members to meet the specifications and product requirements

Work closely with team and actively participate in technical discussions and reviews. Handle assigned tasks independently Pro-actively get design issues/problems solved. Contribute to or propose innovative design solutions and design methodologies.

Should have knowledge in IPs such as SSTL, LVDS, I2C, POD IOs, PVT calibration, HV tolerant and Fail-safe IOs, Crystal oscillator etc.  Knowledge or relevant courses completed in TX and RX design architectures for high speed applications such as DDR4.

Added advantage to have is good understanding of ESD phenomenon, familiarity in ESD circuits design and associated ESD guidelines.

Conversant with tools such as Cadence Virtuoso/Synopsys custom compiler/Hspice/Spectre/Finesim including statistical simulation methodologies.

Experience in Mixed-mode simulation and analog/digital co-simulation will be of added advantage.

Experience in creating EDA model such as Verilog model, Liberty etc will be of added advantage.

Should have deep understanding and working knowledge of CMOS process including FINFET technologies such as 16nm and the associated DSM issues.